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d a t a sh eet product speci?cation supersedes data of 1998 dec 11 file under integrated circuits, ic24 1999 nov 15 integrated circuits 74avc16244 16-bit buffer/line driver; 3-state (3.6 v tolerant)
1999 nov 15 2 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 features wide supply voltage range from 1.2 to 3.6 v complies with jedec standard no. 8-1a/5/7 cmos low power consumption input/output tolerant up to 3.6 v dynamic controlled output (dco) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation low inductance multiple power and ground pins for minimum noise and ground bounce power off disables 74avc16244 outputs, permitting live insertion. description the 74avc16244 is a 16-bit non-inverting buffer/line driver with 3-state outputs. this device can be used as four 4-bit buffers, two 8-bit buffers or one 16-bit buffer. the 3-state outputs are controlled by the output enable inputs n oe. a high level on input n oe causes the outputs to assume a high-impedance off-state. this product is designed to have an extremely fast propagation delay and a minimum amount of power consumption. to ensure the high-impedance output state during power-up or power-down, input n oe should be tied to v cc through a pull-up resistor (live insertion). a dco circuitry is implemented to support termination line drive during transient (see figs 1 and 2). handbook, halfpage 012 4 0 - 200 - 300 - 100 mna506 3 v oh (v) i oh (ma) 1.8 v 2.5 v 3.3 v fig.1 output current as a function of output voltage. fig.2 output current as a function of output voltage. handbook, halfpage 012 4 300 100 0 200 mna507 3 v ol (v) i ol (ma) 1.8 v 2.5 v 3.3 v
1999 nov 15 3 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 quick reference data gnd = 0 v; t amb =25 c; t r =t f 2.0 ns; c l =30pf. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i + ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in volts; ? (c l v cc 2 f o ) = sum of outputs. 2. the condition is v i = gnd to v cc . function table see note 1. note 1. h = high voltage level; l = low voltage level; x = dont care; z = high-impedance off-state. symbol parameter conditions typ. unit t phl /t plh propagation delay na n to ny n v cc = 1.2 v 2.6 ns v cc = 1.5 v 1.8 ns v cc = 1.8 v 1.7 ns v cc = 2.5 v 1.3 ns v cc = 3.3 v 1.1 ns c i input capacitance 5.0 pf c pd power dissipation capacitance per buffer notes 1 and 2 outputs enabled 34 pf outputs disabled 1 pf inputs outputs n oe na n ny n lll lhh hxz
1999 nov 15 4 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 ordering information pinning type number package temperature range pins package material code 74avc16244dgg - 40 to +85 c 48 tssop plastic sot362-1 pin symbol description 11 oe output enable input (active low) 2, 3, 5 and 6 1y 0 to 1y 3 data outputs 4, 10, 15, 21, 28, 34, 39 and 45 gnd ground (0 v) 7, 18, 31 and 42 v cc positive supply voltage 8, 9, 11 and 12 2y 0 to 2y 3 data outputs 13, 14, 16 and 17 3y 0 to 3y 3 data outputs 19, 20, 22 and 23 4y 0 to 4y 3 data outputs 24 4 oe output enable input (active low) 25 3 oe output enable input (active low) 26, 27, 29 and 30 4a 3 to 4a 0 data inputs 32, 33, 35 and 36 3a 3 to 3a 0 data inputs 37, 38, 40 and 41 2a 3 to 2a 0 data inputs 43, 44, 46 and 47 1a 3 to 1a 0 data inputs 48 2 oe output enable input (active low)
1999 nov 15 5 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 fig.3 pin configuration. handbook, halfpage 16244 mna501 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 26 25 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 1y 0 1y 1 gnd 1y 2 1y 3 v cc 2y 0 2y 1 gnd 2y 2 2y 3 3y 0 3y 1 gnd 3y 2 3y 3 v cc 4y 0 4y 1 gnd 4y 2 4y 3 4oe 1a 0 1a 1 gnd 1a 2 1a 3 v cc 2a 0 2a 1 gnd 2a 2 2a 3 3a 0 3a 1 gnd 3a 2 3a 3 v cc 4a 0 4a 1 gnd 4a 2 4a 3 3oe 1oe 2oe handbook, halfpage mna502 na 3 na 2 na 1 na 0 ny 0 ny 1 ny 2 ny 3 noe fig.4 logic symbol. handbook, halfpage 23 mna503 37 12 11 9 8 6 5 47 46 44 43 41 40 38 2 3 26 22 20 19 17 16 36 35 33 32 30 29 27 13 14 24 4en 25 3en 1 1en 48 2en 1 1 3 1 2 1 4 1 fig.5 ieee/iec logic symbol.
1999 nov 15 6 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 134); voltages are referenced to gnd (ground = 0 v). notes 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. above 60 c the value of p d derates linearly with 5.5 mw/k. symbol parameter conditions min. max. unit v cc dc supply voltage according jedec low-voltage standards 1.65 1.95 v 2.3 2.7 v 3.0 3.6 v low-voltage applications 1.2 3.6 v v i dc input voltage 0 3.6 v v o dc output voltage 3-state 0 3.6 v high or low state 0 v cc v t amb operating ambient temperature in free air - 40 + 85 c t r ,t f input rise and fall times v cc = 1.65 to 2.3 v 0 30 ns/v v cc = 2.3 to 3.0 v 0 20 ns/v v cc = 3.0 to 3.6 v 0 10 ns/v symbol parameter conditions min. max. unit v cc dc supply voltage - 0.5 +4.6 v i ik dc input diode current v i <0v -- 50 ma v i dc input voltage for inputs; note 1 - 0.5 +4.6 v i ok dc output diode current v o >v cc or v o <0v - 50 ma v o dc output voltage high or low state; note 1 - 0.5 v cc + 0.5 v 3-state; note 1 - 0.5 +4.6 v i o dc output source or sink current v o =0vtov cc - 50 ma i cc ,i gnd dc v cc or gnd current - 100 ma t stg storage temperature - 65 +150 c p d power dissipation per package temperature range from - 40 to +85 c; note 2 - 500 mw
1999 nov 15 7 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 dc characteristics over recommended operating conditions; voltages are referenced to gnd (groun d=0v). note 1. all typical values are measured at t amb =25 c. symbol parameter test conditions t amb ( c) unit other v cc (v) 40 to +85 min. typ. (1) max. v ih high-level input voltage 1.2 v cc -- v 1.65 to 1.95 0.65v cc 0.9 - v 2.3 to 2.7 1.7 1.2 - v 3.0 to 3.6 2.0 1.5 - v v il low-level input voltage 1.2 -- gnd v 1.65 to 1.95 - 0.9 0.35v cc v 2.3 to 2.7 - 1.2 0.7 v 3.0 to 3.6 - 1.5 0.8 v v oh high-level output voltage v i =v ih or v il i o = - 100 m a 1.65 to 3.6 v cc - 0.20 v cc - v i o = - 4 ma 1.65 v cc - 0.45 v cc - 0.10 - v i o = - 8 ma 2.3 v cc - 0.55 v cc - 0.28 - v i o = - 12 ma 3.0 v cc - 0.70 v cc - 0.32 - v v ol low-level output voltage v i =v ih or v il i o = 100 m a 1.65 to 3.6 - gnd 0.20 v i o = 4 ma 1.65 - 0.10 0.45 v i o =8ma 2.3 - 0.26 0.55 v i o =12ma 3.0 - 0.36 0.70 v i i input leakage current per pin v i =v cc or gnd 1.65 to 3.6 - 0.1 2.5 m a i off power off leakage current v i or v o = 3.6 v 0 - 0.1 10 m a i ihz /i ilz input current for common i/o pins v i =v cc or gnd 1.65 to 3.6 - 0.1 12.5 m a i oz 3-state output off-state current v i =v ih or v il ; v o =v cc or gnd 1.65 to 2.7 - 0.1 5 m a 3.0 to 3.6 - 0.1 10 m a i cc quiescent supply current v i =v cc or gnd; i o =0 1.65 to 2.7 - 0.1 20 m a 3.0 to 3.6 - 0.2 40 m a
1999 nov 15 8 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 ac characteristics gnd = 0 v; t r =t f 2.0 ns; c l =30pf. note 1. all typical values are measured at t amb =25 c and at v cc = 1.2 v, 1.5 v, 1.8 v, 2.5 v or 3.3 v. symbol parameter test conditions t amb unit waveforms v cc (v) - 40 to +85 c min. typ. (1) max. t phl /t plh propagation delay na n to ny n see figs 6 and 8 1.2 - 2.6 - ns 1.40 to 1.60 - 1.8 - ns 1.65 to 1.95 0.7 1.7 3.1 ns 2.3 to 2.7 0.6 1.3 1.9 ns 3.0 to 3.6 0.5 1.1 1.7 ns t pzh /t pzl 3-state output enable time n oe to ny n see figs 7 and 8 1.2 - 5.2 - ns 1.40 to 1.60 - 3.3 - ns 1.65 to 1.95 1.3 2.7 5.5 ns 2.3 to 2.7 0.9 1.9 4.3 ns 3.0 to 3.6 0.7 1.7 3.5 ns t phz /t plz 3-state output disable time n oe to ny n see figs 7 and 8 1.2 - 5.7 - ns 1.40 to 1.60 - 4.3 - ns 1.65 to 1.95 2.0 3.2 6.2 ns 2.3 to 2.7 1.0 1.9 4.0 ns 3.0 to 3.6 1.2 1.8 3.5 ns ac waveforms handbook, halfpage mna504 na n input ny n output t phl t plh gnd v i v m v m v oh v ol fig.6 the input (na n ) to output (ny n ) propagation delay. v cc v m v i 2.3 to 2.7 v 0.5v cc v cc 3.0 to 3.6 v 0.5v cc v cc v ol and v oh are typical output voltage drop that occur with the output load.
1999 nov 15 9 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 handbook, full pagewidth mna478 t plz t phz outputs disabled outputs enabled v y v x outputs enabled output low-to-off off-to-low output high-to-off off-to-high noe input v i v ol v oh v cc v m gnd gnd t pzl t pzh v m v m fig.7 the 3-state output enable and disable times. v cc v m v x v y v i 2.3 to 2.7 v 0.5v cc v ol + 0.15 v v oh - 0.15 v v cc 3.0 to 3.6 v 0.5v cc v ol + 0.3 v v oh - 0.3 v v cc v ol and v oh are typical output voltage drop that occur with the output load. handbook, full pagewidth open gnd 2 v cc v cc v i v o mna505 d.u.t. c l r t r load r load pulse generator s1 fig.8 test circuitry for switching times. test s1 t plh /t phl open t plz /t pzl 2xv cc t phz /t pzh gnd v cc v i r load <2.3 v v cc 1000 w 2.3 to 2.7 v v cc 500 w 3.0 to 3.6 v v cc 500 w definitions for test circuit: c l = load capacitance including jig and probe capacitance (see chapter ac characteristics); r t = termination resistance should be equal to the output impedance z o of the pulse generator.
1999 nov 15 10 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 package outline unit a 1 a 2 a 3 b p cd (1) e (2) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 0.15 0.05 0.2 0.1 8 0 o o 0.1 dimensions (mm are the original dimensions). notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. sot362-1 93-02-03 95-02-10 w m q a a 1 a 2 d l p q detail x e z e c l x (a ) 3 0.25 124 48 25 y pin 1 index b h 1.05 0.85 0.28 0.17 0.2 0.1 12.6 12.4 6.2 6.0 0.5 1 0.25 8.3 7.9 0.50 0.35 0.8 0.4 0.08 0.8 0.4 p e v m a a tssop48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm sot362-1 a max. 1.2 0 2.5 5 mm scale mo-153ed
1999 nov 15 11 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering is not always suitable for surface mount ics, or for printed-circuit boards with high population densities. in these situations reflow soldering is often used. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferable be kept below 230 c. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1999 nov 15 12 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 2. these packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 4. wave soldering is only suitable for lqfp, tqfp and qfp packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. wave soldering is only suitable for ssop and tssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. package soldering method wave reflow (1) bga, lfbga, sqfp, tfbga not suitable suitable hbcc, hlqfp, hsqfp, hsop, htqfp, htssop, sms not suitable (2) suitable plcc (3) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (3)(4) suitable ssop, tssop, vso not recommended (5) suitable data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
1999 nov 15 13 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 notes
1999 nov 15 14 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 notes
1999 nov 15 15 philips semiconductors product speci?cation 16-bit buffer/line driver; 3-state (3.6 v tolerant) 74avc16244 notes
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